instruction counts and cache hits/misses on FPGA

HI group,

I am searching for some technique which can give me instruction count and cache hits/misses for a configuration created using Xilinx FPGA. I have bitstream corresponding to that configuration. My objective is to get the following statistics such as instruction count and cache hits/misses for any application executing on the system configuration downloaded on FPGA.

waiting for reply Pankaj

Reply to
Pankaj
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That's a very strange question. Instruction count and cache misses are related to processors and do not apply to FPGAs per se. You can implement a processor as soft-core in the FPGA and than it's easy to add all your measurement registers in the FPGA.

Martin

Reply to
Martin Schoeberl

I think the poster wants to know these statistics for the embedded PowerPC processor. This is actually very important for users who want to optimize their PPC code. Perhaps one of our Xilinx regulars can provide some hints.

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Joe Samson
Reply to
Joseph Samson

Check out XAPP545: Statistical Profiler for Embedded IBM PowerPC

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Paul

Joseph Sams>

Reply to
Paul Hartke

Martin Schoeberl schrieb:

Well, André DeHon would say that you usually have one instruction and no cache misses if you do not use dynamic reconfiguration.

Kolja Sulimma

Reply to
Kolja Sulimma

Have a look at Seamless FPGA from Mentor Graphics. Although primarily for verification, it can also give you performance stats (cache hit/miss, code profiling, bus utilization).

Kunal

Reply to
Kunal Shenoy

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