Inout ports in EDK

Hello everybody,

I am having trouble incorporating a inout port of my custom peripheral in EDK. I found that the wrapper of the custom IP expanded a inout port into a tri-state _I/_O/_T. I read past posts in comp.arch.fpga that there can be 2 remedies:

1. Using a "THREE_STATE=FALSE, IOB_STATE=BUF" in the .mpd file OR, 2. Make the code EDK compliant by having _I, _O, _T as ports and then EDK infer a inout port.

I tried both options but without luck. The first option (which required the external pin name to be the same as the IP port, which I did), synthesized and the implementation went fine, but the generated bit file did not work as expected in the FPGA.

For option 2, I incorparated the following code,

SDA_I : in std_logic; SDA_O : out std_logic; SDA_T : out std_logic;

SDA_T