Incorporating Cores to the Virtex2Pro PLB

Do you have a question? Post it now! No Registration Necessary

Translate This Thread From English to

Threaded View
Does anyone possess an example of a core incorporated to the PLB of
Virtex2Pro especially if the design is using FIFOs. I am trying to
incorporate my DES core to the PLB bus of the Virtex2Pro for a Single
PPC design.

Thanks,
Noel


Re: Incorporating Cores to the Virtex2Pro PLB
The "Create and Import Peripheral Wizard" is the place to start.
It generates an example user pcore and the device drivers to interface
to it.
http://www.xilinx.com/ise/embe dded/est_rm.pdf

FIFO, DMA, and interrupt support are all available.

Paul

el_boricua wrote:
Quoted text here. Click to load it

Re: Incorporating Cores to the Virtex2Pro PLB
I have read it but an example is more helpful to clear out the details
of what is not in the document.


Re: Incorporating Cores to the Virtex2Pro PLB
When you run the IP Import Wizard, it does generate a very nice example
design.  It was very helpful for me.   Make sure you have the latest EDK
service pack installed since Xilinx is continually adding features to
this area of the tools.  

Paul

el_boricua wrote:
Quoted text here. Click to load it

Site Timeline