Hi all,
When I ran implementation in Project Manager (Xilinx Foundation F2.1i) I've got following errors:
ERROR:NgdHelpers:335 - logical net "SR" has multiple drivers ERROR:NgdHelpers:346 - input pad net "SR" has an illegal connection
the same error was for nets SR11 to SR4 which belongs to bus SR[11:0] - four branches of this bus are connected to inputs of lateches e.g. D[7:0]. I'm not using any of input pad for those nets because they are only internal buses, connecting block to block - so there is no pad in this schematics. I don't understand this errors, which says: "input pad net "SR" has an illegal connection" - what input pad ??? Do you know what could be wrong with this and how can I avoid this ?
Thanks in advance
Sebastian Duszyk