Does anybody know if XST defines any testable variables when compiling verilog code?
Some of the compilers or simulators that I'm using have differing $readmemh() semantics, and I'd like to be able to write something like:
`ifdef INCA initial $readmemh("memory",configurations,0,15); `else `ifdef XST initial $readmemh("memory",configurations,0,15); `else initial $readmemh("memory",configurations); `endif `endif