Instantiating IBUFG as a component shows up in ISE with a ? next to it in the navigator since there is no HDL source file for the declared primitive. Why is this?
The design maps/translates and works fine on the card.
Instantiating IBUFG as a component shows up in ISE with a ? next to it in the navigator since there is no HDL source file for the declared primitive. Why is this?
The design maps/translates and works fine on the card.
Just put the " use UNISIM.VComponents.all; " in the library declaration part it will do the trick..
Moti.
-- synthesis translate_off library UNISIM; use UNISIM.VComponents.all;
-- synthesis translate_on
gives you one warning less during synthesis...
I forgot to mention the "library UNISIM" You got me there ;-))
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