I2C on Xilinx V4

Brad Smallridge schrieb:

What kind of 1.8V requirements? For I2C communication?

There are some app notes that describe a I2C master/slave block, including VHDL source. I dont have the number handy.

Just fine.

This is one solution. In similar situation were multiple devices with the same I2C address had to be connected to a I2C bus, we used I2C switches/MUXes. Philips offers them.

Regards Falk

the easiest way may be adding a picoblaze to handle the i2 initialization

there are some examples,

I am using this approuch to initialize chrontel DVI chips and Agilent smart cameras on an Virtex-4 board

the DVI application (a pong demo) will soon be added to reference designs available online

basically you use the picoblaze as black box and connect to i2c

the code that initializes ch7301 then is coded as picoblaze assembler, like her

; Enable DVI power LOAD sA, 49 LOAD sB, C0 CALL I2C_DVI_WRITE

Antti Lukats

Hi Brad,

I have pasted some code below, hope this helps. We have used this code to control audio volumes of Crystal DACs. The module takes volume data from the outside world and sends them to the DAC via I2C. Should be easy to adapt.

I believe this is way easier than using PicoBlaze for the task.

In case you need the file (due to line break problems, whatever), drop me a line.

Best regards, Felix

-- Dipl.-Ing. Felix Bertram

--------------------------------------------------------------------------------

-- File: i2c.vhd

-- Description: Simple I2C controller.

-- History: Felix Bertram, 2002jan11, Created.

--------------------------------------------------------------------------------

library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all;

entity ValI2C is port ( -- clocks & reset clk24: in std_logic; reset: in std_logic; -- dynamic data from external units (token wrd) val: in std_logic_vector(7 downto 0); -- value idx: out std_logic_vector(7 downto 0); -- index -- i2c bus sda: out std_logic; scl: out std_logic ); end ValI2C;

-------------------------------------------------------------------------------- architecture bhv of ValI2C is ------------------------------------ -- basic structure -- note: data field is used for constants or value-indices type i2cE is (start, stop, const, wrd); type i2cT is record tag: i2cE; data: std_logic_vector(7 downto 0); end record; ------------------------------------ -- Crystal CS43L43 control sequence -- i2c start condition -- i2c address= 001000, R/nW= 0 -- memory address pointer -- volume data -- i2c stop condition type seqT is array(0 to 9) of i2cT; constant seq: seqT:= ( (start, x"00"), (const, "0010000" & '0'), (const, x"04"), -- 04h Channel A Digital Volume Control (wrd, x"00"), (stop, x"00"), -- (start, x"00"), (const, "0010000" & '0'), (const, x"05"), -- 05h Channel B Digital Volume Control (wrd, x"00"), (stop, x"00") ); ------------------------------------ -- clock divider and sequencing signal idxSeq: integer range seqT'low to seqT'high; signal idxBit: unsigned(3 downto 0); signal idxCyc: unsigned(1 downto 0); signal clkdiv: unsigned(8 downto 0); signal clkp1a, clkp1b: std_logic; signal clken: std_logic; ------------------------------------ -- transmit data signal txd: std_logic_vector(8 downto 0); constant txdstart: std_logic_vector(8 downto 0):= "111000000"; -- I2C start pattern constant txdstop: std_logic_vector(8 downto 0):= "000000111"; -- I2C stop pattern begin -- ic2 clock divider, approx 100kHz process(clk24, reset) begin if reset= '1' then clkdiv '0'); clkp1b

The I2C interface is pretty simple for just talking to a slave. I personally find it much easier to just infer a shift register and small state machine rather than putting in pico or microblaze and all the baggage that goes with it.

it depends, :) microblaze is true overkill, but picoblaze isnt, specially if you have some other minor managements taks to take also, then it really pays the fpga resource price it takes

antti

Antti ( snipped-for-privacy@xilant.com) wrote: : it depends, :) microblaze is true overkill, but picoblaze isnt, : specially if you have some other minor managements taks to take also, : then it really pays the fpga resource price it takes

Also if the 'I2C' device isn't following the spec particularly well then debugging the interface by reloading the picoblaze ROM at run time makes for a much better interactive debugging experience than recompiling VHDL!

Of course this isn't relevant as nobody would ever ship a device with a broken I2C compatible interface...

cds

Excellent! Felix, Thank you.

This code synthesizes to 26 slices on a V4. Probably more if more I2C need to be sent.

I needed to change only this clkdiv line to help speed up a ModelSim simulate,

-- signal clkdiv: unsigned(8 downto 0); signal clkdiv: unsigned(1 downto 0);

I'll change it back to adjust to my frequencies.

All the SDA and SCL lines appear to be rising and falling per I2C spec.

Thanks so much.

Brad

Excellent! Felix, Thank you.

This code synthesizes to 26 slices on a V4. Probably more if more I2C need to be sent.

I needed to change only this clkdiv line to help speed up a ModelSim simulate,

-- signal clkdiv: unsigned(8 downto 0); signal clkdiv: unsigned(1 downto 0);

I'll change it back to adjust to my frequencies.

All the SDA and SCL lines appear to be rising and falling per I2C spec.

Thanks so much.

Brad

Hi Brad,

I am glad to hear that this was helpful.

all I2C data are stored in a ROM (seq, seqT) which is probably 10 bits wide (i2cT) and as deep as your I2C sequence requires.

In case you have longer sequences, you might want to check how this ROM is really synthesized. If the synthesizer does not infer the ROM properly, you might want to replace the command tag (i2cE) by a two-bit vector.

the module was originally clocked by a 24 MHz clock. You might need to adjust it to your requirements.

And of course: You will need to create your own I2C sequence. Please note that the module is cyclically repeating the pattern. This might or might not fit with your application.

Best regards, Felix