Hi,
I have a register array with each register having (pointer & data), now I hope to display each of two parts using 2 different names for easy reading in simulation.
Here is code defining the register array R: type R_Type is array(0 to R_SIZE) of unsigned(POINTER_BITS + DATA_BITS-1 downto 0); signal R : R_Type; alias P1 : it shows R array part of (DATA_BITS-1 downto 0); alias P2 : it shows R array part of (POINTER_BITS-1 downto DATA_BITS);
How to write the 2 alias statements in VHDL 2002 or 2008?
Thank you.
Weng