how to readback a frame

hi all, I have a trouble in reading-back a frame of xcv1000e.According to xapp138,139,151,I wrote a .bit file and download it into FPGA via iMPACT.It seems to be successful, but I can't get the data back from TDO.I wander if there is something wrong with my operations.My .bit file is shown bellow: AA99 5566 3000 2001 0000 0000 3000 8001 0000 0004 2800 6001

1/Do I have to add some starting bits and end bits to my .bit file? 2/what kind of .bit file format I can use to download my instructions? 3/Is there anybody who has a successful experience about xapp 138(readback via JTAG)?

Any imformation about readback is welcome! many thanks!

Nicky

Reply to
harbinxiaoting
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Hi Nicky, Sending configuration words using Impact is possible however I don't think this is the way to go. If you did want to try this use an rbt file instead of a bit file (Its one of the bitgen options in ISE). Using this approach I can see how you'd send the readback configuration instructions but can't see how you'll then read the frame data (I don't think impact will support this). I've never tried this approach but would be interested to know if it yields any success.

My suggestion would be to start off using the xilinx xtclsh program, a library is provided with ChipScope called tcljtag.tcl (You'll need a ChipScope license). This provides a high level access to the JTAG chain and is well documented in the ChipScope manual. Using this will however mean you'll need to know a bit about JTAG and embed your configuration instruction words in with JTAG instructions.

If getting ChipScope isn't an option perhaps you should try something like jbits (free download from Xilinx) I'm not sure if the 1000e is supported. Its been a while since I looked at jbits but I'm guessing this option won't be pain free unless your board and FPGA are directly supported by the download. Their is also software called JHDL which provides readback capability again I'm not sure about board and FPGA support.

I hope this is helpful,

Vivian

-- Sandbyte

snipped-for-privacy@hit.edu.cn wrote:

Reply to
Vivian Bessler

hi, Vivian Thanks a lot for your help! Your suggestions do help me a lot! I will try your methords, if there is any advance, I will tell you! Again, many many thanks!

sincerely Nicky

Reply to
harbinxiaoting

hi, Vivian In your reply you mentioned that

what is xtclsh program? Can you give me more information about it? Many thanks! sincerely Nicky

Reply to
Nicky

Hi Nicky, Xtclsh is a tcl shell included with ISE. The ChipScope user manual describes how to use it for JTAG operations.

Vivian

-- Sandbyte

Reply to
Vivian Bessler

Vivian Bessler =E5=86=99=E9=81=93=EF=BC=9A

hi Vivian, I have studied chipScope Manual, but I don't think using chipScope can readback a frame. So I tried Jbits 3.0.As you mentioned, it only support Virtex-II, but it doesn't matter, I can change my FPGA. Now, I am trying to using Jbits upon a free software Hoplite. It seems can readback configration data, modify and download it to FPGA, but I am a beginner with both Jbits and Hoplite.Even though they supply a manual, I still want a simple example of a real implememt. So, if you have any suggention, I will be really thankful!

regards

sincerely Nicky

Reply to
Nicky

Hi Nicky, You can definitely use the tcljtag.tcl file included with ChipScope to readback a frame. The library is documented in Chapter 5: Tcl/JTAG Interface. You need to combine this user manual information with some of the Xilinx application notes on readback via JTAG. JBITs may be a better bet since it supports readback as a basic feature. For questions regarding JBITs your best to join snipped-for-privacy@yahoogroups.com. My guess is that JBITs will offer you high-level readback functions. For lower level stuff your probably better off using the tcljtag.tcl approach. Which approach you choose really depends on what your application is.

Vivian

-- Sandbyte

Reply to
Vivian Bessler

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