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- How to make a clock delay?
January 24, 2007, 11:38 am
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Re: How to make a clock delay?
<anesserm> wrote in message
Only if you disable logic optomizations in your synthesis tool....which in
most cases is generally 'not' what you want to do. PLL (Altera), DCM
(Xilinx) or re-examining the design as to why you think you need a delayed
clock is a better approach.
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