Hallo,
I am a newbie evaluating xilinx tools & FPGAs for our project.Our company traditionally uses altera.We have bought a j83 ac modulator IPcore from Xilinx.In the ISE I have implemented the design.
Now the manual says I must import the EDIF netlist generated by ISE into a new project and use it as blackbox.
I couldnt find any importing button in ISE to import EDIF netlist.
I read some answers on xilinx website and this news groups.They simply say "import the netlist into ISE project".
can anybody help me how to do it?What is file extension for EDIF netlist?
Sorry if it is a trivial query.
Thank you. Monica, Germany
PS:I would like to use the modulator(IP core) and DUC(IP core) and interface them on top level.