How to guarantee the same relative placement and routing in ISE?

Right now I'm using the ISE 8.2i for an FPGA project and doing simulation with a circuit in vhdl in different locations of a single FPGA. In order to make the compared parameters meaningful, I need to ensure that in all the different locations on the FPGA chip, the relative placement and routing of the circuit modules are the same. To ensure the same relative placement, I can move the whole circuit around the FPGA chip in the Floorplan program. But I'm not quite sure about how to guarantee the same routing of the whole circuit. If I choose automatic routing, will there be possibilities that ISE will make different routings between different locations of the circuit? Is manually routing the ONLY way to guarantee the same routing between different locations of the circuit? Thanks!

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jack lee
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