How to estimate PEAK power consumption on Xilinx FPGA ?

What do you mean by peak?

You have to have some capacitors on the supply lines, which will average out any transients.

For CMOS, other than quiescient power (leakage current) power occurs when a gate changes state, and for a very short time.

As you can't predict accurately enough the transition time, you can't predict how many will transition in a given femtosecond.

Now, you might want the average over a somewhat shorter time scale, especially as you might want to know how to divide up the required capacitance, but peak really doesn't have much meaning.

-- glen