Hi,
I am trying to generate a blif from verilog by using the command, quartus_map; however, there are some issues with RAM, so I can't get my blif. In the qsf_assignment_description.pdf, it has command for disabling DSP,set_global_assignment -name "DSP_BLOCK_BALANCING" "Logic Elements", but there is no command for disabling RAM. Does anyone know the command for it or any suggestion?
Thanks, Tiffany