Hallo, i want to add my IP-CORE to Microblaze in FPGA with the IPIF template. i have changed the template according to the documentation and have successfully generated the netlist. Now i import it to ISE. But when i open ISE Project file(system.npl), i could not find my ip-core, just "system_stub.vhd" and system.vhd". so i added the wrappe for my ip-core(it named "my_counter_wrappe.vhd") and the VHDL files of my IP-core.
During generating Programming File of system_stub.vhd (top-level) there was error that "Library proc_common_v1_00_b cannot be found". Should i add my ip-core to the system just like above, or there was still problem in EDK, when i have not my IP-Core in ISE automatically at the beginning? what should be the right steps to generate a bit-file in ISE with my IP-Core and then i can import the bit-file back to EDK?
thanks for your advice and it will help me so much.
krebs