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How to choose an FPGA for High speed applications

Hi all, I want to choose an FPGA for a High speed appliction so which one to go for either for Xilinx or Altera. But i am vey much familiar with xilinx devices. And in the design the gate array will be ineracting with a host PC and two SRAM and with an HDD Inside the FPGA two FIFO are to be implemented. Later on the ASIC of this has to be obtained. so, kindly help me out in this regard

Thanks in advance Kiran

Reply to
kiransr.ckm
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You don't specify what "High Speed" means to you, and even if you did there's no definite answer to your question, but let me say this:

I recommend sticking with the architecture you're familiar with. Feature-wise there's not really much of a difference between both manufacturer's high-end parts. Even though Xilinx people will tell you their devices are better and Altera people will tell you their's are better, every marginal advantage you might have will be used up by having to learn a new architecture.

So if you have know how on one technology, stick with it, unless you desperately need one of the special features of the other.

HTH, Sean

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Reply to
Sean Durkin

I completely agree to Sean, I have used both altera and Xilinx and practically there is not much difference, most of the features and capabilities are same. I would rather base the decision on the support structure and IP/reference design that is available from each of these vendors in your geographic area and work with the one which has the best support.

-- Goli

Reply to
Goli

Hi, Selecting an FPGA for a specific application you may want to answer this questions yourself

  1. Do we have the right expertise (Know how of tool set, FPGA architecture etc)
  2. Does the FPGA have enough slices to support your RTL
  3. Does it support all the IO's required (Mostly Altera and Xilinx supported all the known IO standards)
  4. Part availability, pricing and support and maybe cost
  5. Required silicon speed, will determine the FPGA speed grade requirement
  6. You may have to account for atleast 60% of routing delay for any FPGA (Xilinx or Altera) to get the final P&R frequency estimation. Remember routing plays a major role in the final frequency achieveable

Rajkumar...

Reply to
Rajkumar

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