I am designing a PS2 interface for a board with Xilinx Spartan-3 device. The clock and data signals of the PS2 port are bi-directional and use open-collector circuit. On the board, there is a serial resistor between an FPGA pin and PS2 port. The following constraint is used in ucf file:
NET "ps2_clock" LOC = "..." | IOSTANDARD = LVCMOS33 | SLEW = SLOW | PULLUP;
Can anyone advice me whether it is ok? Can the "PULLUP" option be used to emulate the pull-up resistor in a open-collector circuit?
Thanks in advance.
S. C.