Help with Partial Reconfiguration on Spartan3

Dear all,

I am trying to perform a module based partial reconfiguration on a Spartan3 XC3S400 (on a 3SxLC board by MEMEC). I am using ISE

8.2.01i_PR_07b (sp1 with Early Access Patch) I already was able to perform a difference based partial reconfiguration without any problem, but when trying to perform a module based reconfiguration, when I download via JTAG the partial bitstream it seems that the device reconfigure itself totally: in fact, the static part which only switch on and off a led stops running.

I created the bitstream from the ISE using these command lines:

1) the total bitstream using 2) the partial ones using

In the implementing phase I use the following additional options: for the TRANSLATE phase for the MAP phase

Moreover when implementing the partial module synthesis I deasserted the option "Add input-output buffers"

Is there someone else I should try?

I tried also to create the bitstream using the pearl script (PR_verifydesign and PR_assemble) from the PR patch but I obtained some errors. For instance, when I try to merge the static module with the reconfigurable one using the PR_verifydesign static.ncd dynamic.ncd I obtain the following error "ERROR: Illegal attempt to merge two designs that are not both partial".

I hope you can help me. In case you need more information please let me know

Luca

Reply to
lucaroccasalva
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Hi Luca,

I think that you are using IMPACT to send the partial bitstreams. IMPACT sends a command (I do not remember exactly the name) before sending the bistream that stops all FPGA functionality. To test your partial bitstreams in Spartan3 while the remainder of you circuit continues working you have to use the SelectMap/JTAG interface directly without IMPACT.

Regards,

Ivan

Reply to
salorankatu

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