I'm trying to code an 'enhanced' binary-to-7segments display decoder with ATF750CL and WinCUPL.
I'm experiencing problems using the truth table CUPL construct , so I wrote these test code lines:
Name ATF750CL; Partno XXXX; Date Apr 2007; Revision 0.0 GEAT Floor Display Decoder; Designer mf; Company c companyname snc, 2007; Assembly Custom; Location Naples; Device v750c;
/* Input pins */ PIN [1..11] = [in1, in2, in3, in4, in5, in6, in7, in8, in9, in10, in11]; PIN 13 = in12;
/* Output pins */ PIN [14..23] = [o1, o2, o3, o4, o5, o6, o7, o8, o9, o10];
FIELD input = [in4, in3, in2, in1] ;
FIELD output = [o7, o8, o9, o10] ; FIELD output2 = [o3, o4, o5, o6] ;
/* Basically the output is a copy of the input */ TABLE input => output { 'b'0000 => 'b'0000; 'b'0001 => 'b'0001; 'b'0010 => 'b'0010; 'b'0011 => 'b'0011; 'b'0100 => 'b'0100; 'b'0101 => 'b'0101; 'b'0110 => 'b'0110; 'b'0111 => 'b'0111; 'b'1000 => 'b'1000; 'b'1001 => 'b'1001; 'b'1010 => 'b'1010; 'b'1011 => 'b'1011; 'b'1100 => 'b'1100; 'b'1101 => 'b'1101; 'b'1110 => 'b'1110; 'b'1111 => 'b'1111; }
/* And this also, but on different output pins */ output2 = input;
Well, 'output2' behaves correctly, while 'output' pins are always at 0 level.
Do you know why?!?!?!?!?!
PLS HELP!!!!