Generic synthesis target in Synplify Pro

Hi folks

I'm working with Synplify Pro (8.5.1) and I'm trying to test whether VHDL code is synthesizable. How can I do this without selecting a specific vendor or chip? Is it possible? I thought there might be some concept of a generic target, but can't find anything of the sort.

In particular, I want to get the mapped VHDL file from Synplify and bring it back into ModelSim for simulation and functional verification. So, to tell whether my code is synthesizable, I have to do the following:

  1. Select a specific chip
  2. Run the synthesis
  3. Bring the mapped VHDL netlist file into ModelSim
  4. Bring vendor specific files into ModelSim because they are required by mapped file.
  5. simulate for that chip.

Is there another way?

Thanks in advance, Richard

Reply to
rnbrady
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If your code is not synthesizable, you'll get stuck in the middle of stage

  1. So steps 3-5 are not necessary to tell whether your code is synthesizable. Did I miss something?

Generally, if code is synthesizable for one chip it is synthesizable for any. Of course there will be exceptions to this, and the quality of the synthesis results will vary from device to device, but generally it's good or it's not.

Cheers,

-Ben-

Reply to
Ben Jones

Reply to
subint

Only one restriction comes to mind:

DDR logic (two clocks or both edges of one clock) will only synthesize to targets that have DDR resources (usually IO registers).

Arrays will (with the appropriate restrictions) synthesize to ram on devices that support it, or to registers on targets that don't, but they will always synthesize, regardless of the target.

Andy

Ben J>

Reply to
Andy

rnbrady schrieb:

You need to select a target technology for synthesis. Some constructs are in principal synthesisable but only if your target technology supports these technique (like RAM,...). You might of course write your own generic lib, but it might be a bit oversized for your problem. On the other side it might be very interessting for benchmark reasons, maybe a lib containing only a 2NAND would be enough *g*.

bye Thomas

Reply to
Thomas Stanka

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