Functional problems with Stratix II when configuring at higher temperatures?

Hello,

in my project I have 20 boards with an Altera Stratix II EP2S60 FPGA. When configuring and operating at room temperature (e.g. around 20 deg C), everthing works as expected. When configuring at room temperature and raising the operating temperature to 70=B0 (I have the temp sensing diode connected in the FPGA and can measure the FPGA temperature), still everythings works as it should.

The problems start, when configuring at higher temperatures. From my 20 boards, I tested 17 for this behaviour:

5 FPGAs are ok up to maximum tested temperature of 70=B0C 6 FPGAs fail between 60..70=B0C 2 FPGAs fail between 50..60=B0C 1 FPGA fails between 45..50=B0C 3 FPGAs fail below 45=B0C

One obvious failure I observe are output pins which are set to GND in the design - no other logic driving them. The output pin is pulled high with a 10k resistor. When ok, the output signal is of course low. When failing, the output pins are floating, which results in the signal being pulled high by the pull-up resistor.

A second, more difficult to observe failure case is internal. I have a PCI interface with plain old 32bit, 33MHz. When ok, the software driver reads internal registers with valid values. During failure cases, some registers are not determined.

As I started, when the configuration was done at room temperature, everyting is ok, even if temperature rises to 70 deg C.

I observed the power supplies 1.2V (core) and 3.3V (I/O), they are solid ok, no dropouts detectable with a scope. The board is an 18 layer PCB with of course dedicated power planes and good bypassing.

In the tests it did not matter, how the FPGA was configured; JTAG or passive parallel. Both method had the same results.

Has anybody observed something like this before or can give hints, where I could at?

Thanks a lot in advance,

Henning

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henn2005
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