FPGAs: Where will they go?

What about the NRE costs of ASICs ?

You can forecast FPGA trends a little by looking at the foundres.

eg Look up the recent PR by TSMC, that their first release devices on

65nm will be power optimised, not speed optimised, driven by customer demand.

Also, a new entrant 'mix' in the FPGA arena comes from ST,

They call this a "RECONFIGURABLE MICRO-CONTROLLER WITH DUAL MAC DSP" which has 16MBit DRAM, 300MHz ARM9, 600MHZ DSP, and a 200K FPGA, Dual ethernet, ADC/DAC....

FPGAs have been moving from custom-cell-less ( simple sea of LCs ) to include more hard silicon blocks, like multipliers, RAM, DSP kernal cells, and even uP. That trend will continue, & the 'Gate Array' name no longer strictly applies.

-jg

Although on average it is indeed very, very low, it's already more than zero:

Now, it was wondered in that and other threads if the FPGA was a permanent fixture in the product, or a stop-gap due to high profit margins and fast design rollout (such that once the design has settled down, they will likely switch to an ASIC?).

I assume Altera does this as well, but Xilinx likes to throw around meaningless comparisons about how much it would cost their customer(s) do to a design in the current state-of-the-art (90 nm, for example). What they neglect to mention is that you would likely not need to use anything close to that to achieve your performance targets (if you design was gong to work in an FPGA), so your NRE's would likely be considerably lower than theirs. Note that I am not saying anything about which is actually cheaper for a given design. The actual NRE or per-piece prices are so highly variable from one design to another that I dont think anything except a formal quote on a particular design would be able to tell you the answer.

There's also resource availabilty (money and man-power, in addition to design time, as you mentioned): at least for smaller design firms, the obvious answer is to use FPGA's initially, for all the usual reasons. But after it has hit the market, do you dedicate your scarce resources to respinning that part into an ASIC, or to develop the next best thing that might sell even better? You might take a hit of a few percent of the gross profit margin, but in the grand scheme of things, perhaps that is the smarter thing to do.

Despite the above statements, I'm fairly optimistic that overall FPGA sales will continue to grow... I think the $/LUT has dropped low enough that companies will continue to go for the FPGA's for all the usual reasons.

A few ideas were thrown around on a related topic recently:

Good luck,

Marc

You're basing a PhD on a few guys comments in a newsgroup ? Impressive...

Rene

--
Ing.Buero R.Tschaggelar - http://www.ibrtses.com
& commercial newsgroups - http://www.talkto.net

Some well-thought-out responses to the majority of the questions that you've posed can be found in panel sessions or keynote addresses in conferences like FPGA and FPL from the past couple of years. (For some reason, keynote speakers at these conferences just *love* to rattle the "ASIC vs. FPGA" debate.)

As a PhD student, you should have access to the speakers' PowerPoint slides through your university ...

cheers, Kris

Hi All, Thanks for your responses. Marc and Jim, your responses were very interesting. I learned a lot going through those searches. Rene, I did not say that I will base my PhD topic on this discussion. My advisor is helping me decide a topic in a major way. Through this side discussion, I want to know the industry opinion and opinions of people who use FPGAs in their designs.

Regards,

-Love

Ok, you couldn't have known. The FPGAs are great to work with, enable a lot of developments and save a lot of work. Whether they further evolve or not doesn't change much as what is here already is plenty. The development is a bit too fast though. When you do a new design with brand new chips, then they tend to be outdated the next time you assemble a batch.

Rene

--
Ing.Buero R.Tschaggelar - http://www.ibrtses.com
& commercial newsgroups - http://www.talkto.net

What do people in this forum see is the future of FPGA 4 to 5 years down the line?

FPGA, generic processor, or ASIC? ASICs have won out for consumer applications until recently, but now generic processors are doing tasks that used to be done almost exclusively with ASICs. Take MPEG decoding and/or encoding, like in a DVR for instance. There used to be a dozen or two different chip manufacturers that produced ASICs for this field, and now most of them aren't even bothering to come out with new products. The push seems to be using DSPs to do these things, the TI chips being the obvious leader. Part of this has to do with the ever-changing MPEG-4 "standard" and manufacturers being unwilling to commit tons of resources to design a chip that may be obsolete in a year, but it also makes sense from a technical and risk standpoint to do it in software instead of hardware. DSPs are also very power-efficient, even running full out at 600 MHz or more. Less demanding applications have already gone to generic processors, too.

What are the applications it is most widely used right now, and what will be the applications that it will be highly used in a near future?

Prototyping ASICs. Relatively low-volume tasks where cost is not necessarily the overwhelming priority, instead it's flexibility or development time (space, military, etc.). High-end applications where performance of DSPs is not enough (heavy-duty FIR filtering, etc.). Future applications will be the same as now.

Currently, on average, a consumer (who may own cellphone, camera, camcorder, ipod, etc.) owns zero FPGAs. Do you see this ratio of number of FPGAs/consumer changing?

No.

Or. Do you see power and clock speed to continue to remain as major bottlenecks for FPGAs compared to ASICs in the next few years? Or will the difference diminish in sub 65nm technologies? Or will it blow up??

DSPs and generic processors will continue to take over for ASICs. FPGAs will remain a niche market.

There are two main advantages, as I see, of FPGAs over ASICs or processors - ability to implement designs faster (shorter time to market) and ability to perform easy "firmware updates". Will these two factors ever influence the decisions of designers to switch to FPGAs completely in the future?

Designers of what? Consumer products? No, only if cost is reduced to compete with DSPs, generic processors, and ASICs. Most ASICs these days use microcode anyway and are already firmware upgradable. DSP firmware can be upgraded as easily (perhaps easier) than FPGAs. DSPs have little of the clock speed and power consumption disadvantages of FPGAs, and are cheap too.

If you are not as optimistic about FPGAs as I am sounding, what major bottlenecks do you think will check FPGA growth?

In most applications generic processors will do the job just fine and cost less, burn less power, and might even be cheaper to develop with. Software programmers are cheap nowadays.

Chris,

Good questions. I hope lots of people respond and give their two cents.

Aust> What do people in this forum see is the future of FPGA 4 to 5 years down the

line?

until recently, but now generic processors are doing tasks that used to be done almost exclusively with ASICs. Take MPEG decoding and/or encoding, like in a DVR for instance. There used to be a dozen or two different chip manufacturers that produced ASICs for this field, and now most of them aren't even bothering to come out with new products. The push seems to be using DSPs to do these things, the TI chips being the obvious leader. Part of this has to do with the ever-changing MPEG-4 "standard" and manufacturers being unwilling to commit tons of resources to design a chip that may be obsolete in a year, but it also makes sense from a technical and risk standpoint to do it in software instead of hardware. DSPs are also very power-efficient, even running full out at 600 MHz or more. Less demanding applications have already gone to generic processors, too.

the applications that it will be highly used in a near future?

the overwhelming priority, instead it's flexibility or development time (space, military, etc.). High-end applications where performance of DSPs is not enough (heavy-duty FIR filtering, etc.). Future applications will be the same as now.

ipod, etc.) owns zero FPGAs. Do you see this ratio of number of FPGAs/consumer changing?

bottlenecks for FPGAs compared to ASICs in the next few years? Or will the difference diminish in sub 65nm technologies? Or will it blow up??

remain a niche market.

ability to implement designs faster (shorter time to market) and ability to perform easy "firmware updates". Will these two factors ever influence the decisions of designers to switch to FPGAs completely in the future?

with DSPs, generic processors, and ASICs. Most ASICs these days use microcode anyway and are already firmware upgradable. DSP firmware can be upgraded as easily (perhaps easier) than FPGAs. DSPs have little of the clock speed and power consumption disadvantages of FPGAs, and are cheap too.

bottlenecks do you think will check FPGA growth?

less, burn less power, and might even be cheaper to develop with. Software programmers are cheap nowadays.

Un bel giorno Chris digitò:

My preference would be for FPGA with more specialized functions, and a (really) user-friendly software development environment: pseudo visual programming, no need for external toolchains for embedded CPUs development, integrated debugging instead of crappy simulators, and so on. FPGA are cool, there are a lot of special applications where they are already (and always will be) the best choice; but for the real breakthrough, IMHO they have to win the match with generic 16- and 32-bit microcontrollers/DSP for small and medium-volume applications.

I really don't know much about ASIC, but as far as I can see, I don't think that FPGA would ever be the right choice for this type of volume applications. If I plan to sell one million of units, I don't care much if I have to spend one million dollars for ASIC setup, if then one chip will cost one dollar (ASIC) instead of ten (FPGA).

Generic processors are as fast developing and upgradable than FPGA (if not more), and I used to think that the development steps for ASIC and FPGA until the "real" manufacturing were very similar. Am I wrong?

And by the way, I don't think that if you order one million FPGA, either Xilinx or Altera will ship them overnight. :)

--
asd

Here's another research node : Besides the STW22000 device, in one of the interviews the Cell Processor designers mentioned having configurable IO (and how that allowed design closure earlier). [IIRC IBM does have a cross license to Xilinx FPGAs - Xilinx got the PowerPC in return].

Does anyone have info on just how configurable the Cell processor IO is ? Which tool flows support it ?

-jg

There was a thread here recently where someone saw a Spartan3 part in their new flatscreen TV.

Here come my wishes:

1. Built-in tamper-resistant cryptoprocessor block with write-only nonvolatile memory. There should be no way to read this memory, neither externally (through JTAG, SignalTap etc.) nor internally, because it should contain a wide (at least 128 bits!) symmetric key. This block should have serial input and serial output and encrypt its input data using something very strong, say AES. It doesn't have to be fast, but must be as secure as possible.
2. Configuration bitstreams MUST be encrypted to prevent cloning and to open the field of data encryption to FPGAs -- today every moron with a logic analyzer can easily crack a SRAM FPGA-based scrambler. The encryption block mentioned above can be reused for bitstream encryption too. In this case SRAM-based configuration would not be a problem.
3. There should be a way to "destroy" the chip from its internals, i.e. to make it useless. This could be a trurly physical destruction, but if the cryptoprocessor's nonvolatile memory block were erased, it would be enough.
4. Fuses, more fuses! JTAG disable, readback disable etc.
5. Partial reconfigurability.

Best regards Piotr Wyderski

Look at the trend in the cost of ASIC setup. Compare that with the trend in FPGA gates-per-dollar. Look five years ahead. Now consider a choice between ASIC setup of $2M and an FPGA costing $3. Which would you choose? Once you've had to do a couple of re-spins because your design wasn't quite right first time, your FPGA is looking very cheap. And that's before you factor in the time-to-market advantage.

Making chips is really hard, and is getting harder. More and more companies are realizing that it makes good business sense to let somone else take the hit on sub-micron design, qualification and testing. This leaves their engineers more time for inventing things that actually add value.

Me? I think FPGAs will kill cell-based ASIC within ten years. How's that for optimism? :-)

-Ben-

A more interesting question, is when will we see the first MicroBlaze or Nios in FPGA silicon [not as a soft-cpu]? They are getting close to stable enough to do this.

Or, when we will see a soft-boundary HardCopy - where you can move only PART of the total design into ASIC, and keep the rest as a smaller FPGA.

-jg

True, although I don't see much value in that approach. Those architectures were designed with FPGA as the target technology, so mapping them straight to silicon might not give the best results. What's wrong with the PowerPC core?

Developing and testing your design in FPGA and then hardening it just before putting it into mass production is rather like wearing a life-jacket in the harbour and then throwing it overboard as you set out to sea...

-Ben-

They already license it for ASICs, so it's mainly a question of when it will appear, not if. eg Why do we have HW multipliers & DSP blocks now ? - because they are much faster, and lower power, than FPGA fabric solutions.

Let's see - Price, die area....

Which is why you might want move the proven stuff into HardCopy (or whatever), and keep the smaller, fluid portion, in FPGA.

-jg

Interesting!

They are also functions with a broad usefulness in a variety of applications. The "faster and lower power" argument can be applied to any piece of IP you care to name; just for certain functions the transition to hard silicon makes sense - multipliers, DSP, SERDES, Ethernet MACs, etc. I'm not quite convinced (yet!) that this is true of MicroBlaze/Nios (yet!).

The price premium of FPGAs with hard processor IP is artificial and it will be eroded in time. The efficiency of a hard microblaze/Nios in terms of MIPS/mm^2 will surely, surely be much worse than that of a processor core that was designed specifically for 90nm.

before

the

"Proven" has always been a relative term. By the time you've "proved" that your design is perfect, it's most likely a bit late to be ordering mask sets.

Was your "soft-boundary" idea intended to stay on a single die? That would certainly be interesting, maybe even useful in limited contexts.

-Ben-

line? I see FPGAs displacing processors:

the applications that it will be highly used in a near future? Moving from parallel processing and custom control logic towards custom embedded applications; I do not mean software running on a soft/hard embedded processor but the actual application in its gate level representation (a gate level packet sorting and forwarding app _WITHOUT_ the RTOS overhead, etc.)

I believe Moore's law has proven that processes and design methodologies have kept u:, I have very high expectations on the EDA/CAD vendors to continue providing ways to manage these.

My $0.02,

*** Alfredo

Here is a link to some of the Consumer Products which use FPGA's today.

Enjoy, Subroto Datta Altera Corp.