Hi all
I'm a design engineer trying to evaluate the large number of possibilities for adding Ethernet to our embedded system.
So far I've been very impressed by the Altera Cyclone II with NIOS II and free lightweight TCP/IP stack. Adding Ethernet appears to amount to the Cyclone II and a MAC+PHY chip like LAN91C111 (or equivalent).
Anyone have experience with using the Cyclone II merely for Ethernet? Should I try to put the MAC inside the FPGA and just use an external PHY?
Any recommendations for a communication protocol between the FPGA and my DSP? SPI seems the most obvious choice for reasonably high bandwidth (>6 Mbps). Right now my DSP runs from a 1.5 Mbps UART so mimicking this data flow would save me a bunch of assembly code changes. However, I'd like to send more data back to the host so could use upwards of 6 Mbps.
Also, I'm interested in general recommendations for System on a Programmable Chip (SOPC), which Altera is obviously highly interested in advancing. It seems very attractive since I could eventually get rid of the DSP by simply creating a second NIOS II processor within the FPGA and porting my assembly code to C. The upgrade path is straightforward and indefinite since Altera will keep coming up with even better FPGAs. Any caveats or warnings? Lastly, are there major reasons I should be considering Xilinx instead?
Thanks in advance for the help!
-Todd