We are experiencing problems with our VirtexII FPGA. Preliminary debugging indicates that it may be bad hardware. We want to verify that the cells in the FPGA are good. Is there any kind of diagnostic tool available to scan FPGA and verify hardware integrity? Thanks in advance,
Talk to xilinx. They test the cells before shipping, although it is possible a fault might have made it out undetected, in which case they will be VERY interested in knowing what the fault is as well as how to detect it. It is extremely rare for a cell to go bad later, but again there is a possibility. Generally speaking, if the FPGA does have a hard failure, it is usually going to occur on an I/O that got overstressed (often by ESD). What are the symptoms that lead you to believe it is a hardware fault?
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--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com
"They that give up essential liberty to obtain a little
temporary safety deserve neither liberty nor safety."
-Benjamin Franklin, 1759
If you have strong evidence of a hardware error, you may want to talk to Josh Rosen at Polybus Systems, who's done quite a bit of work on FPGA test patterns. For more, go to
But I agree with Ray. While I've seen I/O cells get fried (and maybe someone whose e-mail moniker is electrostaticman has seen this, too), I've rarely found internal hardware faults in FPGAs, and always make a point to look elsewhere first.
Good luck, Bob Perlman Cambrian Design Works
If you are VERY certain that your Xilinx FPGA is defective, you can ask your distributer (if you bought the FPGA from an authorized source) to start a process called RMA, where you are requested to answer a number of questions and are eventually (if you qualify) given an account number to send in the defective device to. Xilinx will then inspect and E-test the device to find out what went wrong. As said, normally you would expect defective I/O from ESD damage and I don't know if that would qualify, but if you encounter an internal error that can be attributed to a logic cell, it might.
Good luck! /Lars
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