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FPGA Editor and Xilinx ISE 5.1i

Hi all!

I'm trying to make a hard macro of a design and I got that error:

FATAL_ERROR:Ncd:basncmacrodef.c:1466:1.19.2.1 - Mangled nmc file start property read

Seems like the FPGA Editor tool has problems with POWER and GND connections (see former post

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In my case, that gnd/pwr connections are inferred by the synthesis tool, and it's not easy to get rid of them.

My question is if this problem is solved in the ISE 5.2 version? Does it worth to upgrade the tool? Other ideas of overcome this problem? Are there anyone having the same problem?

Thanks,

Santi

------------------------------------ Santiago Esteban Zorita Electric and Electronic Engineering dept. University of Strathclyde snipped-for-privacy@eee.strath.ac.uk

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Reply to
Santi
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Hi Santi,

Since 5.x version, FPGA Editor no longer support hard macro containing Vcc comps. What you'll have to do is declear pins that connects to Vcc as external macro pin and connect the pin to Vcc or '1' in your source code.

Regards, Wei

Santi wrote:

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Reply to
Chen Wei Tseng

comps. What you'll have to do is

Vcc or '1' in your source

Hi Wei,

The problem is the VCC/GND are inferred by the synthesis tool, therefore I can't get rid of them unless there is a way of telling to Synplify not to use them.

I find pretty ackward that the former versions of the ISE supported it and not the newers.

Thanks,

Santi

Reply to
Santi

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