fpga- DDR or DDR2

Hi.

I would need to begin a new fpga design intefacing with external SODIMM at a rate of 400 Mbit/sec/pin.

I have 2 alternatives DDR-SODIMM and DDR2-SODIMM.

From fpga interface prespective, which of them is advantagious ?

ThankXXXXX NAHUMMMM

Reply to
nahum_barnea
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Try to find out if the different FPGA manufacturers offer embedded hardware blocks which will make your life easier when trying to implement DDR/DDR2.

Of course there are also IP cores provided by the manufacturers. Contact some FAEs.

If you want to implement DDR on your own "from scratch" it will be a hard job in my opinion.

Rgds Andr=E9

Reply to
ALuPin

nahum snipped-for-privacy@yahoo.com wrote on 02/08/05 10:50:

Depends on what FPGA you want to use... If it's a Xilinx Virtex2Pro or Virtex-4, then you can use free, ready-to-use IP-cores from Xilinx for both DDR and DDR2, no need to design the controller yourself. And, trust me, you don't really want to design a DDR memory controller yourself if it isn't absolutely neccessary. Designs like that are usually a PITA with all the phase-shifting and data valid windows and crap like that...

I have never worked with Altera parts, but as far as I know they too have free memory controllers you can use with their newer parts.

So, I suppose, from the FPGA standpoint it really doesn't matter if you use DDR or DDR2. You could argue that DDR2 is newer and therefore will be around longer, so it will be easier to get DDR2-SODIMMs in the long run. And you could argue that DDR2 offers higher possible performance... so if you find out later that 400Mbit/sec isn't enough, you can run it at 533 or even 600 (with a really fast FPGA), whereas with DDR that's about as high as you can go, AFAIR.

cu, Sean

Reply to
Sean Durkin

It could be worth looking into the technology a bit more, and reading a few application notes. DDR2 is newer and is designed to be able to go faster - if (and I'm no expert) this allows for greater data valid windows, then it may be better to go for DDR2 for the better margins.

It's also going to depend on which FPGA you use - V4s, for instance, have better support for source-synchronous IO than some of early {Xilinx} designs, which may make the job easier - not too much of a problem if you use a core though, and don't actually have to do the design yourself.

my 2c Jeremy

Reply to
Jeremy Stringer

Samsung claims crossover for DDR2 chips Mark LaPedus (08/10/2005 10:05 PM EDT) URL:

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SAN JOSE, Calif. After a slow start due to high costs, DRAM makers are finally experiencing the long-awaited demand for double-data-rate (DDR)

2 SDRAM products.

Samsung Electronics Co. Ltd., for one, on Wednesday (August 11) said that it has entered the DRAM crossover point between DDR1 and DDR2 devices as main memory for PCs.

As of July, some 40 percent of the company's total DRAM output is DDR2 and approximately 30 percent is DDR1. This marks the first month that production of DDR2 has crossed over to take the lead from DDR1 in bits produced, according to Samsung (Seoul).

"The industry has been waiting for a clear indication that DDR2 has become the dominant memory for electronic data processing applications. We are seeing an upsurge in interest in DDR2 from system OEMs as well as system integrators, something that will continue to accelerate into

2006," said Tom Quinn, senior vice president of memory sales and marketing at Samsung Semiconductor (San Jose), in a statement.

The company has seen a 30-fold growth for DDR2 in the past 12 months. DDR2 technology claims to provide faster speeds, better signal integrity, improved thermal characteristics and reduced power consumption over DDR1.

DDR2 took some time to devel>

Reply to
Paul Hartke

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