FPGA : Constraint for BRAM placements

Do you have a question? Post it now! No Registration Necessary

Translate This Thread From English to

Threaded View
Hi want to know how to add Location constraint for BRAM placements in my design

I am using a statement like this

INST "coeff_ram1" LOC=RAMB16_X1Y1;

But the problem is i don't know how to find out the location values to put for
my FPGA Spartan-3e ie the correct values for X?Y?

can any one help me rgds bijoy

Re: FPGA : Constraint for BRAM placements
Quoted text here. Click to load it
my FPGA Spartan-3e ie the correct values for X?Y?
Quoted text here. Click to load it

One way would be to do an automatic place & route of the design and then open
it in the floorplanner to see where the place & route tools placed your
memories. That is probably a good starting point. Using floorplanner
you can even write out a UCF file containing the placement if you want to.

/Andreas

Site Timeline