yes, checking connections is defenetly possible. Also many other things, like programming non JTAG memories and other non JTAG devices if those are connected to FPGAs or devices with JTAG boundary scan.
check out www.jtag,com
I guess pretty much expensive tools.
if you dont mind some programming yourself I have an windows application that uses 2 PLDs in JTAG chain to program an FPGA (not on boundary scan!) and then via that FPGA an parallel Flash memory. This application could be modified to test your custom board. The schematics extraction would be manual, or if you can import netlist from sch a netlist reader could be added to provide the link to your schematics.
I recall that Memec was selling a low cost boundary scan tester just for this sort of thing. I don't remember what it was called, or what it cost, but I do remember that "low cost" was getting more expensive. I guess they found that they had to raise prices to make ends meet. This tends to be a low volume business area and so they have to charge higher prices. Too bad there are no open source tools for this. But I have not even found much support from the chip makers in this area. They build boundary scan into their chips and leave the rest to you! The best you can hope for is a BSDL file.
--
Rick "rickman" Collins
rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
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Arius - A Signal Processing Solutions Company
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If you have multiple pins between the two devices don't forget you can write test designs to pass data back and forward to and from each device multiple times.
If you have detectors on each input pin you might be able to read back the status of each, this spotting where any errors are occurring.
Nial
------------------------------------------------ Nial Stewart Developments Ltd FPGA and High Speed Digital Design Cyclone Based 'Easy PCI' proto board
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