FPGA as heater

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We have a ZYNQ whose predicted timing isn't meeting decent margins.
And we don't want a lot of output pin timing variation in real life.

We can measure the chip temperature with the XADC thing. So, why not
make an on-chip heater? Use a PLL to clock a bunch of flops, and vary
the PLL output frequency to keep the chip temp roughly constant.


--  

John Larkin         Highland Technology, Inc
picosecond timing   precision measurement  

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Re: FPGA as heater
On Mon, 10 Apr 2017 18:13:13 -0700, John Larkin

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Why not?  Don't bother with the output frequency, just vary the number
of flops wiggling.

Re: FPGA as heater
On Mon, 10 Apr 2017 22:15:50 -0400, snipped-for-privacy@notreal.com wrote:

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That would work too. Maybe have a 2-bit heat control word, to get
coarse steps of power dissipation, 4 groups of flops. I suppose a
single on-off bit could be a simple bang-bang thermostat.

The PLL thing would be elegant, proportional control of all the flops
in the distributed heater array.

I'm thinking we could reduce the overall effect of ambient temp
changes by some healthy factor, 4:1 or 10:1 or something.


--  

John Larkin         Highland Technology, Inc

lunatic fringe electronics  


Re: FPGA as heater
On 4/10/2017 11:06 PM, John Larkin wrote:
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Are the die temperature variations caused by ambient temp changes, or on  
chip heat generation changes?

--  

Rick C

Re: FPGA as heater
On Mon, 10 Apr 2017 20:06:57 -0700, John Larkin

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You can do the same thing with the flops.  Use a shift register to
enable flops in a "thermometer code" sort of thing.  Too low - shift
right.  Wait.  Still to low - shift right.  Wait.  Too high - shift
left...

There are all sorts of algorithms  that can be built into spare flops.
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Seems reasonable.  IBM used to add heater chips for the same purpose
(bipolar circuits run faster at high temperature).

Re: FPGA as heater
On Tue, 11 Apr 2017 21:09:52 -0400, snipped-for-privacy@notreal.com wrote:

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CMOS is slower at high temps. Somewhere between about 1000 and 3000
PPM/K prop delay.




--  

John Larkin         Highland Technology, Inc

lunatic fringe electronics  


Re: FPGA as heater
On Tue, 11 Apr 2017 19:26:01 -0700, John Larkin

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I understand but my point was that regulating temperature to control
speed has been done.  It's not a strange idea at all.

Re: FPGA as heater
On 2017/04/11 7:26 PM, John Larkin wrote:
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Do you use that property of CMOS (slower the warmer it gets) as an  
automatic negative feedback loop for your heater?

John

Re: FPGA as heater
On 4/15/2017 12:21 PM, John Robertson wrote:
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That would likely not work nearly as well as directly measuring the  
temperature of the die.  Notice he said the chip has a built in  
thermometer.  The only issue with using the thermometer is the  
temperature across the die will vary.  Using the delay to control the  
heater might work well in concept, but would be hard to measure and  
still only work for the output being measured.  Any other outputs will  
be spread around the die and so not isothermal.  But mostly the timing  
would be hard to measure.

He has an oven/refrigerator.  He could measure the change in timing over  
temperature for some number of samples.  This would give him an idea of  
how much spread is involved.  There are multiple sources of timing  
spread and he can control one and sort of control another.  He wants an  
idea of how much timing spread is left.

--  

Rick C

Re: FPGA as heater
On 2017/04/15 9:37 AM, rickman wrote:
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Thanks for the explanation. I am not a qualified board designer, just a  
bit of a hacker designing and making the few I need for my restoration  
business. It is nice to get the background of design considerations as I  
find that information useful in determining where designs have gone  
wrong in our equipment and try to make improvements to the systems.

As an example - Common/Ground designs in early arcade games were not  
always at their best. A number of early electronic pinball games used to  
burn up driver transistors and coils at random until I traced the  
problem - which was  a design error where all the commons (MPU, Audio,  
Solenoids, Lamps) came together at the regulator board through several  
different pins, and as each pin connection oxidized slightly it allowed  
ground potential differences between the MPU and the solenoid logic  
grounds, leading to the transistors being slightly biased on...
And this game logic had been designed by Rockwell.

John

Re: FPGA as heater
On Saturday, 4/15/2017 1:15 PM, John Robertson wrote:

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This sort of poor design is common in consumer electronics.  Likely
the engineer wanted more or better ground connections, but got shot
down due to increased cost of connectors with either more pins or
better plating (silver or gold).  As long as the oxidation issue
happens _after_ the warranty period expires, there's no incentive
to correct the design, either.

--  
Gabor

Re: FPGA as heater
On Mon, 10 Apr 2017 18:13:13 -0700, the renowned John Larkin

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Clever, and maybe patentable. Maybe you could servo a ring oscillator
frequency to the clock by changing the dissipation and directly
stabilize the timing.  

--sp  

--  
Best regards,  
Spehro Pefhany

Re: FPGA as heater
On Tue, 11 Apr 2017 00:26:33 -0400, Spehro Pefhany

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That would work too. We'd have to persuade/fool the tools into letting
us build a ring oscillator!

I've used ring oscillators to measure FPGA chip temp before:

https://dl.dropboxusercontent.com/u/53724080/Thermal/ESM_Ring_Oscillator.jpg

The change in prop delay vs temp is fairly small.


--  

John Larkin         Highland Technology, Inc

lunatic fringe electronics  


Re: FPGA as heater

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That's more linear than I would've guessed.  Is that the ambient temperature or junction temp?

Re: FPGA as heater
On 4/11/2017 12:31 PM, Kevin Neilson wrote:
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Even if it wasn't especially linear, the proportionality is based on  
degrees Kelvin.  So the non-linearity would not be terribly pronounced.

That was part of the reason for the inflate-gate thing a couple of years  
ago.  I remember that between the pressure being relative rather than  
absolute and the temperature being Celsius or Fahrenheit rather than  
Kevin, the people here took some time to figure out that the reported  
pressures were easily explained by the difference in temperature between  
the locker rooms and the playing field.

--  

Rick C

Re: FPGA as heater
On Tue, 11 Apr 2017 09:31:20 -0700 (PDT), Kevin Neilson

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Foil-sticky thermocouple on the top of the chip. It was an Altera
Cyclone 3, clocked internally at 250 MHz.

https://dl.dropboxusercontent.com/u/53724080/PCBs/ESM_rev_B.jpg

The ring oscillator was divided internally before we counted it, by 16
as I recall.

Newer chips tend to have an actual, fairly accurate, die temp sensor,
which opens up complex schemes to control die temp, or measure it and
tweak Vccint, or something.







--  

John Larkin         Highland Technology, Inc

lunatic fringe electronics  


Re: FPGA as heater
John Larkin wrote:

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Reminds me my old idea of building domestic heaters out of Pentium4  
chips. 20 chips with TDP of 135W make a decent heater and one can
always sell the waste MIPS.

    Best regards, Piotr



Re: FPGA as heater
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We do that by controlling the fan speed: keeps the FPGA ~40C which is in the
middle of its timing range.

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BTDT. It's not as simple as that, because CPUs are point heat sources.  To
distribute the heat (and stop them melting) you need decent heatsinks and
cooling.  Servers, which do useful compute and emit waste heat, tend to be
cooled assuming a high-velocity, high-noise environment.  Domestic heating
wants low-velocity, low-noise - which needs different enclosure and cooling
arrangements.  The system ends up being substantially custom by the end of
it.

You can get a long way with a dual-socket server board (~400W) in a
'workstation' case, but it's quite space-inefficient.  You can't pack CPUs
too closely together, first for thermal reasons but also because RAM and IO
take up board area.  (Blade servers do that, but again they're designed for
fast air cooling).

Unless you plan to put your 'furnace' in the basement with enough sound
insulation to deaden the howling fans.  Or watercool - needing most custom
stuff.

Theo

Re: FPGA as heater
On 11 Apr 2017 12:26:08 +0100 (BST), Theo Markettos

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We do have provision for adding a pin-fin heat sink and a fan directly
over the chip. Like this:

https://dl.dropboxusercontent.com/u/53724080/Thermal/Uzed_Fan_Side.JPG

Just yesterday someone was harassing me to make the fan speed software
controllable, so maybe I will.

I'd rather not have an FPGA fan, but it's pretty likely we'll need it.
There will be an overall box fan, and it is speed controlled.

https://dl.dropboxusercontent.com/u/53724080/Circuits/Power/Fan_Regulator.jpg


--  

John Larkin         Highland Technology, Inc

lunatic fringe electronics  


Re: FPGA as heater
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FWIW, we have a simple hardware control loop of the fan PWM.  This is the
source:
https://github.com/CTSRD-CHERI/beri/blob/master/cherilibs/trunk/peripherals/FanControl/FanControl.bsv

Theo

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