Hi all,
I have question on measuring FPGA area. Measuring area cost of the FPGA implementation is tricky because there are several different area types LUT, FF, BRAM, DSP. Is there way look at a uniform cost model which combines all of then.
- Some early version of ISE had equivalent gate count number for an VHDL implementation. But it's not available anymore.
- Slices seems to be the common unit of comparison. This is consists of LUT and FF. But how about BRAM, DSP. Can I say estimate the BRAM cost like this? One 6input LUT(V6) = 64 x 1 bit RAM
For DSP, I wrote simple code with 25x18 multiplier and then 48 bit accumulator and set no dsp usage in synthesis to get the slice number as 154 slices. (This was done using a Virtex 6.)
Is this a good estimate? Are they are any alternative ways to measure an uniform cost of FPGA implementation?
Thanks in advance.:)