FPGA 2006 - Call for Papers - Now Accepting Submissions

Hello,

I'd like to bring to your attention FOUR important items:

FPGA 2006:

1) NEW - Online Submission is now open
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2) REMINDER - FPGA 2006 Call for Papers (Sept 23)

Upcoming "Special Issue on FPGA" journal submissions:

3) REMINDER - J. of Microprocessors and Microsystems (Sept 15) 4) NEW - EURASIP J. on Embedded Systems (Dec 15)

More details for items 2,3 and 4 are provided below.

Enjoy! Prof. Guy Lemieux University of British Columbia Vancouver, Canada

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FPGA 2006: Call for Papers

Fourteenth ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

Hyatt Regency Hotel Monterey, California February 22-24, 2006

The ACM/SIGDA International Symposium on Field-Programmable Gate Arrays is the premier conference for presentation of advances in all areas related to FPGA technology. For FPGA 2006, we are soliciting submissions describing novel research and developments in the following (and related) areas of interest:

FPGA Architecture: Novel logic block and routing architectures, combination of FPGA fabric and system blocks (processors, memories, etc.), new commercial architectures, impact of modern and future technologies (including ultra-deep submicron and nanometer scale) on the design of FPGA's (e.g. soft errors, leakage, power density, fabrication defects).

Circuit Design for FPGAs: Novel FPGA circuits and circuit-level techniques.

CAD for FPGAs: Placement, routing, retiming, logic optimization, technology mapping, system-level partitioning, logic generators, testing and verification, CAD for FPGA-based accelerators, CAD for incremental FPGA design and on-line design mapping and optimization.

High-level abstractions, tools, and systems for FPGAs: General-purpose and domain-specific models, languages, tools, and techniques that facilitate the design, development, debugging, verification, and deployment of large-scale and high-performance FPGA-based applications and systems.

FPGA-based and FPGA-like computing engines: Compiled accelerators, reconfigurable computing, adaptive computing devices, systems and software.

Rapid-prototyping: Fast prototyping for system-level design and logic emulation.

Applications: Innovative use of FPGAs, exploitation of FPGA features and architectures, uses of FPGAs to achieve high-performance, low-power, or high-reliability, FPGA-optimized DSP techniques, novel uses of reconfiguration, FPGA-based cores.

Authors are invited to submit English language PDF of their paper (10 pages maximum) and panel proposals by September 23, 2005. Notification of acceptance will be sent by November 21, 2004. The authors of accepted papers will be required to submit the final camera-ready copy by December 19, 2004. A proceedings of the accepted papers will be published by ACM, and included in the Annual ACM/SIGDA CD-ROM Compendium publication.

Address questions to: Andre' DeHon, Program Chair FPGA 2006 Dept. of CS, 256-80, CALTECH Pasadena, CA 91125 Phone : (626) 395-6569 Email : snipped-for-privacy@cs.caltech.edu

Organizing Committee General Chair: Steve Wilton, University of British Columbia Program Chair: Andre' DeHon, California Institute of Technology Finance Chair: Herman Schmit, Tabula Publicity Chair: Guy Lemieux, University of British Columbia

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Call for Papers

Special Issue on FPGA-based Reconfigurable Computing Journal of Microprocessors and Microsystems

Overview: Recent advances in Field Programmable Gate Arrays (FPGAs) make reconfigurable computing possible that the boundary between hardware and software is blurred. Some of the computation extensive code can be shifted directly to hardware either through on-line and off-line mapping. Performance will be greatly enhanced especially in systems such as scientific computing, multimedia applications, computer security, etc.

The purpose of this special issue is to provide a unique scientific opportunity for researchers, engineers, vendors, and designers to report recent advances in this important area of reconfigurable computing and applications using FPGAs. Topics include, but not limited to, the following:

FPGA Technologies " FPGA architectures " New algorithms for space reduction " Placement and routing techniques " Partial Reconfiguration " Reconfigurable computing " Evolvable Hardware " FPGA Nanotechnology

High Performance Computing using FPGAs " Scientific computing " Image processing " Software testing and debugging " Just-in-time compilation " System-on-chip Solutions " Power-aware design " Arithmetic computation " Tools " Networking " Security

Submissions will be evaluated on Novelty, Generality, Significance, Clarity and Support criteria. We invite the submission of full length papers to this special issue that will details the state-of-the-art technology and trends in FPGAs and reconfigurable computing.

Important Dates: " Paper submission deadline: Sep. 15, 2005 " Notification of the first review: Oct. 30, 2005. " Revisions due: Nov. 30, 2005. " Final notice of acceptance: Dec. 15, 2005. " Final version manuscripts due: Jan. 15, 2006. " Special issue to appear: Early 2006.

Instructions to the authors:

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Guest Editors J. Morris Chang Department of Electrical & Computer Eng. Iowa State University, Ames, Iowa, U.S.A. snipped-for-privacy@iastate.edu

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Chia-Tien Dan Lo Department of Computer Science University of Texas at San Antonio San Antonio, Texas, U.S.A. snipped-for-privacy@ieee.org

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EURASIP Journal on Embedded Systems

Special Issue on

Field-Programmable Gate Arrays in Embedded Systems

Call for Papers

Field-Programmable Gate Arrays (FPGAs) are increasingly used in embedded systems to achieve high performance in a compact area. FPGAs are particularly well suited to processing data straight from sensors in embedded systems. More importantly, the reconfigurable aspects of FPGAs give the circuits the versatility to change their functionality based on processing requirements for different phases of an application, and for deploying new functionality.

Modern FPGAs integrate many different resources on a single chip. Embedded processors (both hard and soft cores), multipliers, RAM blocks, and DSP units are all available along with reconfigurable logic. Applications can use these heterogeneous resources to integrate several different functions on a single piece of silicon. This makes FPGAs particularly well suited to embedded applications.

This special issue focuses on applications that clearly show the benefit of using FPGAs in embedded applications, as well as on design tools that enable such applications. Specific topics of interest include the use of reconfiguration in embedded applications, hardware/software codesign targeting FPGAs, power-aware FPGA design, design environments for FPGAs, system signalling and protocols used by FPGAs in embedded environments, and system-level design targeting modern FPGA's heterogeneous resources.

Papers on other applicable topics will also be considered. All papers should address FPGA-based systems that are appropriate for embedded applications. Papers on subjects outside of this scope (i.e., not suitable for embedded applications) will not be considered.

Authors should follow the EURASIP JES' manuscript format described at the journal's web site:

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. Prospective authors should submit an electronic copy of their complete manuscript through the EURASIP JES' manuscript tracking system at the journal's web site, according to the following timetable.

Manuscript Due December 15, 2005 Acceptance Notification May 1, 2006 Final Manuscript Due August 1, 2006 Publication Date 4th Quarter, 2006

GUEST EDITORS:

Miriam Leeser, Northeastern University, USA; snipped-for-privacy@coe.neu.edu

Scott Hauck, University of Washington, USA; snipped-for-privacy@ee.washington.edu

Russell Tessier, University of Massachusetts, Amherst, USA; snipped-for-privacy@ecs.umass.edu

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