Hi everyone, I'm experiencing something weird in my code implementation that leaded me to question which is the correct way to enable a flip-flop. Assuming I have a clocked output of a FF one cycle long (*en*) which will enable two different sequential logics according to the value of a signal *sel*, so *en1* and *en2* will be produced. Which is the best way to produce *en1* and *en2*?
When I designed the logic the first time I was doing something like this:
process (clk, nrst) begin if nrst = '0' then en1