Hello All, I'd like to know if the generally held advice that Distributed Arithmetic (DA) filters are the "best" way to implement FIR filters on an FPGA still holds good when one uses a Virtex-][. In my application, I require a 256-tap filter which takes in
18-bit samples at 50 MSPS and decimates it down to 10 MSPS (coeffs are 16-bit). I use an XC2V3000. Currently, we don't have the hardware required to synthesize the complete design (not enough memory), so I've synthesized just the filter with a simple testbench. It turns out that MAC FIR filters require far less resources than a DA-FIR one with an equivalent spec. Could this be due to Virtex-]['s multipliers or is this some quirk I'm not taking into account? Thanks in advance. -Jim.- posted
20 years ago