Hi,
I'm a student using Altera Quartus II v6.1 to program a Cyclone II on a DE2 development board. I'm starting to build a library of Verilog modules to re-use in future projects (mostly simple things like adders, flip-flops, etc. - I don't want to use MegaFunctions too much to avoid getting locked into Altera products) and I was wondering the best way to do this. I notice that, when I compile a project with a library folder (containing another project for, say, an adder), I get a warning that the compiler is using abc.v (or whatever the verilog file is called) as a design file although it is not included in the current project - which is what I want it to do. However, this implies that it is "compiling in" abc.v into the current project, which seems a waste.
So... is there an equivalent of "object code" in C++ that I can include in my projects? So, for example, I could compile my full adder module, copy some file (not the verilog code, but a compiled/partially compiled binary file) into my library folder, and then use it in future projects without making Quartus recompile it.
Based on file size, I'd say the *.sof file is the best bet, but I haven't found any information as to what this file is for. In any case, I'd like to know what all the other files are for (apart from the *.rpt files, which I know are the reports from the compiler, simulator, etc.). Can someone point me in the right direction?
Thanks in advance, Allan Lewis.