Hello!
I meant that I need a FIFO + this special "feature" to convert the data to the right length. I thought that i could solve this problem by building a special FIFO.
How could I solve this problem?
Thanks, Simone
"Peter Alfke" schrieb im Newsbeitrag news: snipped-for-privacy@xilinx.com... : Simone, when you call this a FIFO, it makes it sound complicated and : creates fear of non-synchronous problems. But this does not seem to be : the case here. : I would just use the appropriate number of registers with the right : input muzes and a tiny state machine that makes them do the right thing : at the right time. You need to consider the required frequency or time response. : Should be quite simple. : : Peter Alfke : ================= : Simone Winkler wrote: : >
: > Hello! : >
: > I want to build a FIFO for a special purpose: : > I've got a microcontroller that interfaces to a SDRAM via an : > SDRAM-interface. The microcontrollers data width is 16 bit while the : > SDRAM-interface needs 32 bit (if i write something to the sdram, in the : > first clock cycle, the interface needs the bank, row and column address (32 : > bit) and in the second clock cycle the data (only 16 bit, the upper
16bit : > are just don't care)). : > Now I need a FIFO that converts the 2x16 bit to one 32-bit word. Timing is : > not important, only the 2 words of 32 bit have to be sent one clock cycle : > after the other. (so i don't need a "doubling" of the clock rate, just a : > method to combine the two incoming words) could it work with a kind of shift : > register? : >
: > Thank you for your help! : >
: > Simone