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FIFO design

what is the difference in using DPRAM instead of RAM for asynchronous FIFO design?

Is it necessary to use DPRAM for designing Asynchronous FIFO?

Reply to
siva007i
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A dual-port RAM is ideal, because you can dedicate one port to the writing, and the other one to the reading, with no interaction between them (until you go full or empty).Only the flag control is tricky. With a single port RAM, you must arbitrate between the asynchronous reading and writing, since the RAM can only perform one operation at a time. A low-performance (

Reply to
Peter Alfke

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