Farrow filter VHDL implementation?

Hi Group,

Does anyone know how to implement a Farrow FIR filter usng existing FIR cores, or whatever is available? The filter is similar to a standard FIR but includes a polynomial expansion with an offset parameter "d" raised to integer exponents like:

y(x+d) = a0 + a1*d + a2*d^2 + a3*d^3 + a4*d^4 + ... alternatively expressed as:

y(x+d) = a0 + d*(a1 + d*(a2 + d*(a3 + d*(a4 + ...))))

I only need an expansion to fourth order but I need at least four channels of FIR processing using this filter. It would be nice to use a generic FIR filter core for this but I cannot find a way to include the geometric "d" parameter to get the desired output. I would think that this is easy to do, but the Xilinx references about Farrow filters don;t provide enough details to illustrate the implementation.

If anyone has more detail on this issue I would love to know.

Thanks Andrew

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Andrew Lohbihler
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