Hi Folks, Incredibly busy summer here, so before burning my brain cells, Googling or -worst- digging in my very dusty math courses, I submit this question to the DSP experts who usually float around, hoping some aren't at the beaches ;-)
How would you extract D from a X = K / (D * D) value (16 bits) ?
- in a small FPGA indeed, which has no embedded mult (but a mult could be synthesized)
- please don't answer to synthesize sqrt(1/x) !
- I have lots of clock cycles available to compensate the lack of FPGA resources.
- I would like to avoid a Piece-Wise Linear estimator if possible (though it would allow for coding sensor non-linearities).
In the past, I remember implementing an sqrt operator using a suite (the suite didn't converge as rapidly as it might, but the implementation was easy), so a similar technique would be nice. But I keep an open mind : any idea is most welcome :-)
Thanks, Bert