ethernet phy- DP83847

Hello Everyone, I have few questions regarding the DP83847 PHY. I have this PHY on xilinx virtex fpga board. The data sheet is on this link

formatting link

I need to write an ethernet mac in the fpga to send the packets to the

PC through the PHY. Initially, to start with i am implementing the transmit module. 1) when i hardware reset the PHY, the link estabilishes between the PC

and the fpga board, but whatever data i put on the MII interface on the

TXD(3:0), i am not able to see anything when i check the pin TD+- in the oscilloscope. For some reason the PHY is not transmitting the data. a) Do i need to initialize the PHY before/after i hardware reset it. If yes how? b) By default , if i hardware reset, the PHY will act in 100 mbps full duplex mode. So i guess , just to test this PHY, i dont have to

use MDC and MDIO right? c)Do i need to exactly send the ethernet packet format to the PHY inorder to test it correctly with the oscilloscope or will i be able to see any data if i check it in the oscilloscope? d) will i see a sinusoid on the TD+ pin when i check it in the oscilloscope or is it a square wave.

I would appreciate , if you could please answer my questions as soon as possible.

a) No need to init the PHY - after reset it will operate cleanly

b) You do not need to play with MDC and MDIO

c) You do not need to send an ethernet packet to the PHY - it doesn't care what the data is

d) It will be sinusoid - but it should already be running, I would imagine, as the link setup has occurred (100Mbps was autonegotiated). At least you should see some data while autonegotiation is going on, and you will see similar patterns when you transmit data. The data on the wires is a 125MHz signal, not 100MHz.

For Tx to work you need only...

TxEn asserted TxErr deasserted TxClk running cleanly

Don't try to 'see' the TxD bits coming out on the TD pins - sending '0000' on TxD does not cause TD pins to transmit 0000; they do something much more exciting that you probably don't want to get in to.