I've just upgraded to 8.2 ISE and EDK and my project doesn't synthesize anymore. It complaints about not finding x_O,x _I, and x_T pins in the system module. Until now I used to instantiate system instead of system_stub in my ISE top-level design and thus avoided manual deleting of IOB instantiations. Now, Xilinx changed how they generate system.vhd and system_stub.vhd, so that my old method doesn't work anymore. What is the legal way of doing this? I edited system.vhd, but this doesn't seem to be enough and I hate the idea of needing to do it manually every time I change something in the system... The matter is further complicated by the fact that in some pcores (older ones I guess) bidir signals were declared in MPD with I, O, and T ports separately, so that one could easily make them separate external ports. In the newer cores (e.g. MPMC2) the ports are declared as IO in MPD, and I don't get it how to pass them up through the hierarchy cleanly...
Really mad at all the time I've wasted installing the tools and now fixing my design. BTW, the only reason I installed 8.2 was because 8.1 crashed with the infamous portability errror, so I thought it was time to try the new version!!!
Thanks, /Mikhail