Hello All,
I am having a hard time understanding EDK ---> FPGA tool flow (I think). I am using EDK/ISE 8.1, testing the Generic Reference Design from Memec/Avnet. It is for the Xilinx FX12 mini-module.
I have been able to use the drivers supplied to control the LCD screen, rs232 uart and the user LEDs as expected. But when it comes to a specific FPGA pin of my choice I'm getting lost.
I first started out with their example, and created my own spin off of theirs, trying to learn my way around the IDE of EDK. All is working well except my understanding of the UCF file corresponding to the data inside EDK. Ok, so in my xparameters.h file I see there are refferencing the memory locations for each component in the system assembly. So in C I can assign these "registers" via the drivers and get expected results. When it comes down to bit by bit I am lost.
Is the UCF file that I'm using generated by EDK, or did someone from memec hand sculpt this? Maybe I have to import this into an ISE project to get the big picture?
When I assign a gpio output 0x0550 I can see one 5 on my FPGA pins, but not in the order I would expect it. Really it's not a five at all, unless I'm reading all the even pins. And I thought the gpio output was 32 bit, so why in the UCF file is there only 10 pins assigned to the gpio output port(s)?
I hope I am not being to vague/mis-guided, and even confusing you guys. Because I have certianly exhausted my confusion. I've also read over a ton of documentation from XIlinx, about EDK, the drivers, etc... I was searching for that golden document that would tell me exactly what I needed to know and I havn't found it yet. Maybe I am not looking for the correct topics in the manuals? Maybe I need to read over PowerPC user guide a bit more? Help point me in the wright direction!
Thanks, Kyle