hi
is there a reason why the clock divisor for the spi clock in edk 9.1 cant be smaller than 16? i would need 4. is there a way to do that or do i have to write my own spi module?
thanks urban
- posted
16 years ago
edk + spi
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- posted
16 years ago
its simpler to write your own, besides the OPB_SPI is very bad in terms of logic levels, very often it is reducing the max clock of the entire system
hm, I think some xilinx ref design includes some other SPI core and there is free SPI core from finger lakes also
formatting link
there are some links
Antti
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- posted
16 years ago
hi
thanks for the answer but i can't open the file. it says i don't have access rights.
urban