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EDK 6.1 vs 3.2 and OPB Bus resets

Hey all.

I'm having a problem with transitioning to EDK 6.1 with a custom OPB peripheral.

I started out with EDK 3.2/ISE 5.2 with a custom OPB peripheral in a Microblaze system on a V2 with a well populated OPB bus. That system works fine, but we have new hardware and need to transistion. I'm moving to EDK 6.1/ISE 6.1 with a V2Pro/PPC system with the same OPB peripheral.

The new system has a PLB->OPB bridge and on the OPB bridge is 3 OPB UART Lites and the custom OPB peripheral. The PPC is running a simple "hello world" type program. The program runs fine without the custom core connected. With the core connected and not accessed, the OPB bus resets after any of the UARTS tries to spit out more than 16 characters at a time.

The custom core started out using opb_ipif_ssp0_v1_00_a, then I upgraded it to v1_00_b. Both exhibited the same behavior. It isn't connected to drive to any resets and only the OPB bus resets. Not the PLB. When I address the peripheral with more than 16 addresses in a row or more than

16 access to the same address, there doesn't seem to be any OPB bus resets.

Is there a transition guide somewhere that I missed?

What I haven't tried/am planning to try:

1) Go back to a Microblaze system but on the V2Pro. 2) Downgrade to EDK 3.2/ISE 5.2 and use the V2Pro. (bit of a pain, this one). 3) Port the OPB Peripheral to PLB.

I'm just trolling to make sure I didn't miss anything obvious.

Thanks!

--Carlos V.

Reply to
Carlos Villalpando
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Not sure if this will help in your case, but I've had some problems with the combination "UART Lite" and "Custom IP Core" as well. The bus didn't reset, but the system just stopped working altogether after 16 bytes were sent over UART. In my case the solution was to explicitely set the C_MIR_BASEADDR and C_MIR_HIGHADDR parameters for my IP-core, after that it all worked fine. The strange thing is that I need to set this even if I turn off the MIR completely.

I don't know if this will help you, but trying won't hurt.

BTW, I'm using EDK3.2 and ISE5.2, but since your problem sounds so similar to mine I though I'd respond anyway.

--
Sean Durkin
Fraunhofer Institute for Integrated Circuits (IIS)
Am Wolfsmantel 33, 91058 Erlangen, Germany
http://www.iis.fraunhofer.de

mailto:23@iis.42.de
([23 , 42]  [durkinsn , fraunhofer])
Reply to
Sean Durkin

That was it. Odd for me too since I'm not using the MIR either. So I set it off to la-la land where the PLB->OPB bridge didn't translate.

--Carlos V.

Reply to
Carlos Villalpando

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