dynamic fpga via bytecode sequence?

hi

designing an open and free specification IC (OFSIC) and am wondering of the possibility of a bytecode for programming a moderate array, and loading the in and out for custom functionization on a runtime basis.

must be a bytecode, can have a literal fetch and other things, does not have to handle jumping as the cpu will do that, this is just a synchronized program and eval parrallel bytecode stream.

for convienice lets limit it to 64k unique programming bits, but less may be possible.

cheesr

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Jacko
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