If you ever spot ( or need help writing/testing ) a FPGA DVI transmitter, let us know!
I've been thinking about trying that for a small S3E home project; lots of colo{u}rful pixels with only a few differential output pins and no PHY.
Seems like a simple bias network could shift the (DC-balanced) encoding scheme from LVDS to TMDS levels ( or just use an S3A with TMDS drivers )
Max resolution would be limited by the FPGA I/O rates to say a 60-80 Mhz pixel clock; I think that gets you into (or near) 1024x768 territory.
IIRC, you can map the DVI-D signals directly onto an even smaller HDMI connector for a really tiny board ( PS/2, HDMI, VQ100 FPGA )
have fun, Brian