Hi,
I vaguely seem to remember a provision on the use of downto in EDK. I tried to dig this out before posting this with no luck---Can't remember where I came across this though I tried a couple of keyword searches in random EDK pdf docs. Kinda doubtful about something I've just written in EDK using many downto's. Would appreciate a hint on this.
BTW, is Xilinx planning any short-term remedy for this? Keeping track of minor details is a bit daunting especially when you'r supposed to do loads of things from electronic circuitry design, DSP algorithmic development, to VHDL coding---You know academia!
Regards,
-Manny