Dio5 interface with ps2 port

Hi, I am trying to interface a keyboard with the Xilinx Dio5 board ps2 port using EDK(c dev kit). From my understanding, the keyboard sends out a low for 50ms(or whatever time) before it sends the scan code. I am confused on how i poll for this 50ms time. Do i put it in my main{} code to poll everytime for this scan code or does the keyboard have some sort of interrupt? In addition, do i have to map every single key manually or is there another way? Thanks!

Reply to
Phil
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I would suggest writing a PS/2 interface, or adapting an existing one. You really don't want software manually handling a slow peripheral like a keyboard or mouse. I have a PS/2 UART core that just handles recieving and transmitting - you have to implement scancode conversion and keyboard/mouse state in higher level logic or software.

Note, you can use a ROM to handle the scancode conversion to ASCII, if all you need is text. Simply pass your scancode into the ROM as the address, and take the output of the ROM as your data. I would suggest, at a minimum, keeping track of the shift key. Use a state-bit as an additional input to your ROM, so you can provide both shifted, and non-shifted, characters.

Reply to
radarman

I am not sure what you mean by the PS/2 UART core. Do I have to write this core myself or can i get it from somewhere? My knowledge of this stuff is extremely limited. In addition, I was suggested to use 2 GPIOs to take the input of the clock and the input of hte keyboard signal. If i tried to implement it this way, do u have any idea what i should do?

Reply to
Phil

Check out the user guide for the Spartan-3E starter kit. It's a very concise description of what the PS/2 keyboard interface is.

It seems you assume you can decode the clock and data directly in software. You can, but it would require polling them in an expensive loop. Not quite so expensive if you hook up the keyboard clock to generate an interrupt, but still.

Radarman suggested to decode the clock and data in RTL and present the decoded data in a io register. Raising an interrupt upon new data is a good idea.

Here's a snippet from when I was playing with it:

module main(.... ..... filter #(25_000_000,90_000) filter_inst1(clk25MHz, ps2_kclk, ps2_kclk_filtered, ps2_kclk_stb); filter #(25_000_000,90_000) filter_inst2(clk25MHz, ps2_kdata, ps2_kdata_filtered, ps2_kdata_stb);

/* All the following could just a easy (and much cheaper) be done in sw. */

always @(posedge clk25MHz) begin /* Capture on every negedge if already started or if a start bit is seen */ if (ps2_kclk_stb && ~ps2_kclk_filtered && (kdata_count != 0 || ~ps2_kdata_filtered)) begin /* ... */ kdata

Reply to
Tommy Thorn

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