digital analog conversion

"Veronica Matthews" wrote in news:cmvum3$ici$ snipped-for-privacy@news.cs.tu-berlin.de:

Assuming that the DAC you use has a DC response, there should not be a droop problem. The DAC should maintain its output indefinitely until you write a new value.

--
Al Clark
Danville Signal Processing, Inc.
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You might investigate the use of serial DAC's. Depending on the requirements, they have a small footprint and are relatively cheap. You could use one for each channel, and it should hold the value until you change it.

Keep up the faith,

Newman

best!

a

me,

Write the DAC once and stop clocking it. Other than noise pick-up through the power-supply, reference and any other analog signal conditioning, the value should remain static. This is assuming you aren't using some kind of bizarre AC coupled output DAC.

Rob Young

Thanks for your numerous answers so far. For a better understanding let me elaborate on my intention. What I want to do is to handle several outputs (with the analog representation of the digital value) with just one single D/A converter. That means: feed the digital values through a single D/A converter and switch the converter output to one analog hold circuit per channel. Therefore the goal is to hold the analog values! The analog values to be hold are DC, that's true. Again, would it be advisable to use a capacitor and op-amp? How should I dimension the capacitance and how can I affect the droop? Is it realistic to expect virtually no droop? Isn't it, that with a large time constant the charging time would be endless? Maybe the solution is nearer as I can see? Maybe there is another way to solve the problem. But this "one D/A converter for multiple output channels"-configuration should be seen as basic condition!!!

Many greetings, Veronica

Just to put my aim in perspective: I'm neither trying to fool you nor trying to get my homework solved (like a given individual presumed). Why I am talking about a basic condition with respect to the "one D/A converter for multiple output channels"-configuration is that this single D/A converter already exists in hardware. It is there, physical, for me to touch, already bought... And now I want to use this very D/A converter to feed several output channels. Of course I could buy a DAC for every channel but that's not my intention. The hardware setup does not allow to solder other devices on the board. So PLEASE just take it as it is! I want to solve the problem that way. So don't try to proselytize me like that jehovah's witnesses guys... ;-)

Hope you come up with more constructive suggestions!

Veronica

I guess you agree that this is a rather strange requirment! As you said before, let's not talk WHY you need to do so in the first place, and just think of HOW you can do it. The simplest solution would be to use a sample and hold IC. These ICs include a very low drift output op-amp, a very high impedance switch and rely on an external capacitor for the "sampling" of the input voltage. As an example, you can take a look at this:

The critical parameter for you is deltaV / deltaT for the hold state. Typically, this value is round one milivolts per second for a good quality

1u capacitor! So for 5 minutes that would be round 0.3 volts. Maybe you can find a better part than LF198 but the big problem is to find a very high quality capacitor that it's internal impedance is actually much higher than the input impedance of the sample and hold IC. The advantage of using ICs like that is their tiny size and small board area (you just need one small IC and one capacitor).

Regards Arash Salarian

But she doesn't need to hold for 5 minutes. The DAC can be updated at a 1 MHz rate. If she has 10 outputs, she can refresh each output every ten microseconds. As long as the DAC and t/h have no serious glitch this has no downside, and allows the use of small caps without droop.

ok, what you want is a sample-and-hold for each channel and yes that could be a cap a switch and an opamp buffer, the "droop" will depend on the capacitor and what's discharging it (don't forget that cap is self)

you say you can't solder anything on the board, but you can fit several opamps high quality switches and caps? what will control the switches?

A multiple output DAC give you all of it in a single package, it so much simpler and most likely better...

you do sound a little like the jehovas witnesses ;)

-Lasse

Presumably you have space for the analogue sample/hold or demux arrangements?

Well, I won't try to proselytise, but you really need to know that some problems just *can't* be solved "as it is"! Maybe the solution can be found only if you re-frame the problem somewhat...

Since you want DC-like output, it seems to me that the best way would be to make a bank of sample/hold circuits, one per output channel, and refresh them as frequently as possible. The digital value corresponding to each channel's output can be held in an internal register or small RAM bank, and the one-and-only DAC can be cycled round all these values continuously. That way, the sample/hold circuits don't need particularly special droop performance and they could probably be built using simple analogue switches and small-value capacitors. It would require just a little extra logic in your FPGA, of course, but it sounds like only half an afternoon's work to me.

Alternatively, why not abandon the dedicated DAC altogether, and provide one single FPGA output per analogue channel? These digital outputs can then be pulse-width modulated by logic inside the FPGA, and low-pass filtered on the output side by a simple single-stage RC. Once again, the fact that you are trying to create "DC" outputs comes to your aid: the RC filter can be quite brutal (have a very long time constant), simplifying the PWM design.

I know of no straightforward analogue sample/hold that can give you very low droop over a period of minutes. Consequently, your original approach to the problem is unworkable. No proselytising, just good old-fashioned experience!

--
Jonathan Bromley

How quickly and how often can you cycle through the channels? If you can afford to do it at a high rate to refresh the outputs, the sample/hold requirements may be fairly simple.

At the extreme, if you have a fast enough clock and can afford to devote on on-chip counter per chanel, or a fair amount of processor attention to the problem, you can just use pulse width modulation of your chanel selects to produce your outputs, without needing any external "DAC hardware" at all. Or look at doing sigma-delta modulation.

Don't rule out the possibility that you may find multichanel outboard DAC's that take up less board space than whatever analog sample/hold solutions you could come up with.

Chris

It is far easier to do extended hold in the digital domain. If you are bent on doing it in the analog domain, you'll need a sample/hold amplifier for each channel. In the end, this is going to require more circuit than if you abandoned the DAC you have and replaced it with one for each channel. If you insist on going the analog route, you will relieve the requirements somewhat by refreshing the output channels much more frequently than the external update rate.

Perhaps a better solution would be to do a Sigma-Delta DAC for each channel. All that is required outside of the FPGA for that case is a simple one pole RC filter for each channel, and one FPGA pin to dedicate to each channel. Inside the FPGA the DAC is basically a couple adder/subtractors. I think Xilinx has an

app-note on this subject complete with the code for the FPGA macro. The macro itself is quite small, and the signal coming out can be of very high quality when the update rate is low. The effective resolution depends on the chip rate, which equates to the FPGA clock rate relative to the output sample rate.

Ver> Just to put my aim in perspective: I'm neither trying to fool you nor trying

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401/884-7930 Fax 401/884-7950 email snipped-for-privacy@andraka.com

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Tragic.

So no touching the DAC, or the board it is on. And you are time multiplexing multiple channels of data through this 1 DAC (how many? I dont really care).

But if you are willing to build sample and hold circuits, you must have some signals which tell you which channel is being sent out on the DAC at any time, so that you would know which sample and hold is to be updated.

This also means that you are willing to build more hardware, just not more DACs on the board you have.

(I had a long and tangential response to this. I assure you that you are glad that I replaced it with this note!)

Fine. Be that way.

1) Can't touch the DAC you have. 2) Willing to build hardware after the DAC 3) Have signals that tell you which channel the DAC is currently outputting

A) Analog sample and holds droop. Good caps and design can minimize it but "no droop" is impossible over temperature.

Constructive Suggestion:

Take the DAC output and run it into an ADC. Take the ADC output and register the output into multiple DACs, one per channel. Use your channel select signal to control which DAC gets updated.

This design does not touch your board with the DAC.

Handles as many channels as you want.

Has NO DROOP.

Is easier to design than fancy pants low droop S&H, and does not have any expensive low leakage caps, or 0.000nA input current op-amps.

Uses less components that the S&H solution.

Is probably cheaper than the S&H solution too. For example, the Maxim MAX5732 implements 32 DACs, each with a holding register. Small quantity price is $130

A Maxim MAX1340 with an ADC and 4 DACs on one chip is $21

There are an insane number of options of which ADC and DAC you could choose.

Hope that is constructive enough for you.

Philip

Philip Freidin Fliptronics

(snip)

(snip)

That is an interesting suggestion. Not so long ago CD players used one DAC with two S&H to save the cost of one DAC. There were people who believed that the phase shift was noticable, though I don't know that there was ever proof of it.

It seems that the DAC is now cheaper than the S&H.

-- glen

People that can hear the difference can compensate by sitting 3.86 mm closer to one speaker (at sea level). Correspondingly less for systems using oversampling. For instance, early Philips players used 4x oversampling, so only a 0.965 mm shift would be necessary.