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Differential terminations in Virtex2 Pro.

Hi All, I'll open a webcase too, but I'm posting in hope of a super quick answer! Here's my question:-

V2P has on-chip differential terminations for LVDS signals, e.g. LVDS_25_DT. See answer #17244. However, although 3.3V banks can support LVDS receivers, the terminated mode is not allowed. I quote:-

"Requirement to Turn on the On-chip Input Differential Termination The VCCO of the I/O bank must be connected to 2.5V to provide 100 ohms of effective termination. NOTE: Starting ISE 6.1i, this requirement is implemented in the software. "

So, this sounds like it's just the new 6.1 software that stops you turning on the termination in 3.3V banks. What happens if you use old software and turn on the termination in a 3.3V bank? Why is it not allowed? Is it just that the termination impedance is different? If so, what is it? It's not hard to change the characteristic impedance of my traces to match a different termination. Is the problem that it's not tested when the parts are produced? My problem is in banks 4 and 5 where a 3.3V 8 bit data bus configures the device. These banks also contain some dedicated clock input pins that I want to use internal terminations on.

Thanks for reading, Syms.

Reply to
Symon
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Symon wrote: My problem is in banks 4 and 5 where a 3.3V 8 bit data bus configures

I would change the Vcco to 2.5 V on those banks. That cannot cause any problems with the incoming 3.3-Vdata bus. Peter Alfke

Reply to
Peter Alfke

Hi Peter, OK, but the signals come from another board, they're ringy (is that a word?) and I'm concerned about over/undershoot, I'd prefer to give myself the safety margin of 3.3V VCCO. Anyway, nice attempt to change the subject ;-) , I wonder what the deal is with the on chip terminations? thanks again, Syms.

that I

Reply to
Symon

Also, are you sure about this Peter? When I read the data sheet for LVCMOS25 inputs, the Vih max is VCCO + 0.4V, so putting 3.3V into a 2.5V bank is against the rules. I would expect the catch diodes to conduct. Where am I going wrong? thanks, Syms.

that I

Reply to
Symon

Symon,

V2P does not support 3.3V Vcco powered LVDS (at least, that is what the data sheet says).

Aust> Hi All,

Reply to
Austin Lesea

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LVDS_25_DT.

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Austin, (With tongue in cheek) I think you'll find that "The differential input buffers are powered by VCCAUX and are not VCCO-dependent. For this reason, you can put LVDS_25 and LVPECL_25 input buffers in a 3.3V bank; the software does not report errors and the device is not damaged. In this case, the input specifications are as specified for LVDS_25 and LVPECL_25." Or at least that's the gospel according to answer 16830!!

So, I'm allowed LVDS inputs on a 3.3V bank, so why can't I terminate them on-chip?

thanks, Syms.

Reply to
Symon

Symon,

Hmmmm. I was thinking of both input and output. You are right.

Perhaps the software thinks like I do?

Aust> > Symon,

Reply to
Austin Lesea

I believe you have *less* safety margin with the 3.3V VCCO. The abs max voltages on the pin are

Gnd + 3.6V to VCCO - 3.6V.

With a 3.3V VCCO, you can exceed the abs max voltage (with your "ringy" signals) before the catch diode conducts.

With a 2.5V VCCO, the diodes will stop you from exceeding the voltage rating, but you may exceed the current rating when driving from a 3.3V device with stiff outputs. A small value series resistor fixes that problem. (You probably need a series resistor for signal integrity reasons anyway.)

On my current board I use all 2.5V signalling on the FPGA (not including the LVDS stuff). There was a legacy 3.3V level processor interface, and I used a number of 74ALVC164245 to handle the level translation.

Regards, Allan.

Reply to
Allan Herriman

Did I say that? The latest version of the data sheet has changed the abs max voltage to 4.05V (up from 3.6V). I wish I could have found that out *before* I added all those 74ALVC164245s to the board.

Regards, Allan.

Reply to
Allan Herriman

Allan,

4.05v is the abs max. You will feel much better beiung within the recommended operating conditions. The 4.05V is really not a change. The old overshoot and undershoot amounted to the same m=number (3.75v Vcco + a 0.3 undershoot = 4.05V relative to the Vcco pin).

Aust> >

Reply to
Austin Lesea

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