I am instantiating an LVPECL iobuffer in a xilinx spartan-3 device. This buffer is sending out data at 150Mbps into an LVPECL receiver chip located about 18 inches away. The sent signal doesn't have enough amplitude to overcome the hysteresis in the receiver. My measurements indicate that there is very little attenuation in this signal from driver to receiver. Its just that the signal at the fpga is of almost no amplitude. If i lower the clock rate to 100Mbps it works fine. I don't really care about standards compliance here, i just want it to work ( at 150Mbps). Is there some way i can increase the slew rate or drive strength of the driver? Perhaps changing io-standards?
Thanks in advance,
Jon Pry